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General • Re: Trace FIFO and TPIU with ITM

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Well, this is just the beginning of the journey, it is just tough, not impossible :)

Another thread related with some feedback from RPI engineers about what they implemented in hardware and what not: viewtopic.php?t=375494

Basically there is no SWO (which I consider to be good, that's more complicated and slower).
You need to keep in mind, that some register bits are related, but in this case not implemented, while other bits are meaningful in the same (hidden) register.

Also I found why there are not so many examples: it's highly dependent on the hardware implemented (very modular) and ... it's under NDA for commercial purposes. The whole debugging system (with all subsystems) is made to be used by commercial debuggers (which means a lot of money). Fortunately, ARM is also providing open information, but spread across a lot of documents. To find that one bit ... one meaningful bit ... I had to look across 7 books (with many apparent contradictions, due to different implementations), and to use an oscilloscope, which helped a lot to keep what's left of my minds, almost gave up, but when I've seen the clock signal and 1 bit data stream ... well, it's actually working, but I'm not capturing it properly.

DEFINITIVE GUIDE TO ARM® CORTEX®-M23 AND CORTEX-M33 PROCESSORS
Arm® Cortex®-M33 Processor, Technical Reference Manual
Arm® CoreSight™ ETM-M33, Technical Reference Manual
Arm® CoreSight™ SoC-400, Technical Reference Manual
Arm® CoreSight™ System-on-Chip SoC-600M, Technical Reference Manual
Arm® CoreSight™ Architecture Specification v3.0
Arm®v8-M Architecture, Reference Manual

Statistics: Posted by gmx — Sun Nov 10, 2024 3:18 pm



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