Ah, I see. Yes, a tricky situation.
![:D]( "Very Happy")
Perhaps a DT overlay like the following:
To get the device junction temperature at that power dissipation, take the Rth(j-a) value from the datasheet and multiply by Pd, then add ambient temperature - e.g. for 75C/W and 25C ambient: Tj = (Rth(j-a)*Pd)+Tamb = (75*0.45)+25 = 58.75C.
But! Note under what PCB mounting condition the datasheet Rth(j-a) is specified for. Sometimes the figure is given assuming a certain large copper area, sometimes with just minimum footprint, sometimes both. There can be a huge difference between them - e.g. min. footprint might be 190C/W and roast your MOSFET with >100C temp! But with some heatsinking copper area to get lower Rth(j-a) like above and it's more reasonable.
While I suspect that might actually work, I'm pretty sure it wouldn't be compliant with the spec.2)Two EEPROMs (one standard address and one power mode 1 address) on the same hat
That would just make it a Power HAT, and therefore using GPIOs would be against spec.3)A standard/power hat but with a power mode 1 address
Hmm. While I think it might be possible for a Standard HAT to set usb_max_current_enable in /chosen/power with a DT overlay (it's just another property, after all), I'm not sure whether doing so would actually affect anything. It might be the case that DT property simply reports the status of what the bootloader decided to do. Or maybe it does have affect. Or maybe the bootloader will load the DT overlay and the usb_max_current_enable property will be set, but then the bootloader will overwrite the value with what it decided. I suppose you could just try it and find out.4)A standard/power hat with some method of set usb_max_current_enable=1 from EEPROM dtoverlay
The last is the best but I do not know how to make the firmware setting from dtoverlay?
Perhaps a DT overlay like the following:
Code:
fragment@0 {target-path = "/chosen";__overlay__ {power: power {usb_max_current_enable = <1>;hat_current_supply = <5000>; // mA};};};Yes, that is correct. For example, for 5A load and 18m ohms Rds(on): Pd = 5^2 * 0.018 = 0.45W.what I am not sure I have correct is how to calculate power dissipation; if I have it right it would be P=(I*I) R since the duty cycle is 100% that can be ignored.
To get the device junction temperature at that power dissipation, take the Rth(j-a) value from the datasheet and multiply by Pd, then add ambient temperature - e.g. for 75C/W and 25C ambient: Tj = (Rth(j-a)*Pd)+Tamb = (75*0.45)+25 = 58.75C.
But! Note under what PCB mounting condition the datasheet Rth(j-a) is specified for. Sometimes the figure is given assuming a certain large copper area, sometimes with just minimum footprint, sometimes both. There can be a huge difference between them - e.g. min. footprint might be 190C/W and roast your MOSFET with >100C temp! But with some heatsinking copper area to get lower Rth(j-a) like above and it's more reasonable.
Statistics: Posted by HwAoRrDk — Wed Dec 11, 2024 9:34 pm