Different than the other recent thread about caches.
Does the BCM58712 have a "snoopy" L1 D-cache ? That is to say, is there hardware that maintains D-cache consistency across all processor ?
I have an idea that requires "shared memory", not using ANY system calls. Direct reading and writing to memory. it ASSUMES "bus snooping" of the L1 D-cache so that it act like a dual port memory.
Does the BCM58712 have a "snoopy" L1 D-cache ? That is to say, is there hardware that maintains D-cache consistency across all processor ?
I have an idea that requires "shared memory", not using ANY system calls. Direct reading and writing to memory. it ASSUMES "bus snooping" of the L1 D-cache so that it act like a dual port memory.
Statistics: Posted by theoldwizard1 — Sat Jan 11, 2025 12:49 am