Bare metal, Assembly language • Re: MMU Intermediate Physical Address size

Mystery solved... From section "D5.1.3 VMSA address types and address spaces" of "ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile" I read...

• The top VA subrange runs up to address 0xFFFFFFFFFFFFFFFF.
With a maximum VA width of 48 bits this gives a VA range of 0xFFFF000000000000 to 0xFFFFFFFFFFFFFFFF.
With a maximum VA width of 52 bits this gives a VA range of 0xFFF0000000000000 to 0xFFFFFFFFFFFFFFFF.
Reducing the VA width for this subrange increases the bottom address of the range.

In other words, to change from having a 48 bit upper VA address space to 36 bit (under a 4KB granule), both the following changes are needed:

• TTBR1_EL1 needs to point to a level 1 table, not a level 0 table
• virtual addresses need to be in range 0xfffffff000000000 - 0xffffffffffffffff (rather than 0xffff000000000000 - 0xffff000fffffffff)

In hindsight, this is quite reasonable. Anyway, mystery solved!

Statistics: Posted by pmoore — Sat Jan 18, 2025 1:25 am

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